DC Microgrids. Группа авторов

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СКАЧАТЬ for stability analysis.Figure 8.6 Circuit diagram of DCL-QB converter.Figure 8.7 Step response of DCL-QB converter.Figure 8.8 Types of controller used in power converters.

      9 Chapter 9Figure 9.1 Classification of modulation schemes for MC.Figure 9.2 Circuit configuration of three-to-n phase (a) direct MC (b) indirect ...Figure 9.3 Switch configuration of sparse MC.Figure 9.4 Switch configuration of very sparse MC.Figure 9.5 Switch arrangement of the ultra-sparse MC.Figure 9.6 Shortened high-frequency model of (a) a five-phase IM (b) phase ‘A’ o...Figure 9.7 Drive system fed from Three-five phase MC.Figure 9.8 Switching combinations of three-to-five phase MC.Figure 9.9 Three-phase input filter.Figure 9.10 Equivalent circuit of a MC.Figure 9.11 Clamp circuit to protect the MC switches.Figure 9.12 Schematic of electrical power requirements in the aircraft.Figure 9.13 Application of matrix converters in the wind energy systems.

      10 Chapter 10Figure 10.1 Basic inverter Topology.Figure 10.2 Two inverters connected in series.Figure 10.3 Stepped waveform of multilevel inverter.Figure 10.4 Advantages of multilevel inverters.Figure 10.5 Basic classification of multilevel inverters (MLIs).Figure 10.6 One leg of a bridge of diode clamped MLI.Figure 10.7 Output voltage waveform of diode clamped MLI.Figure 10.8 THD analysis of diode clamped MLI.Figure 10.9 Flying capacitor multilevel inverter (one leg of a bridge).Figure 10.10 Output voltage waveform of flying capacitor MLI.Figure 10.11 THD analysis of flying capacitor MLI.Figure 10.12 Cascaded H bridge multilevel inverter.Figure 10.13 Output voltage waveform of cascaded H bridge multilevel inverter.Figure 10.14 THD analysis of cascaded H bridge multilevel inverter.Figure 10.15 Formation of seven-switch five-level ANPC topology (a) Circuit I (b...Figure 10.16 Proposed seven-switch five-level topology.Figure 10.17 Output voltage waveform of proposed ANPC MLI.Figure 10.18 THD analysis of proposed ANPC MLI.Figure 10.19 Comparison of various parameters in different types of MLIs.

      11 Chapter 11Figure 11.1 Proposed step-up topology.Figure 11.2 Equivalent circuit of proposed converter in CCM, during a) mode I, b...Figure 11.3 Key waveforms of proposed converter during CCM operation.Figure 11.4 Comparison of the proposed structure in terms of (a) gain, (b) numbe...Figure 11.5 The equivalent circuit of the proposed converter during DCM operatio...Figure 11.6 The theoretical waveform of inductor currents in DCM.Figure 11.7 The separator curve of the CCM and DCM regions, related to the induc...Figure 11.8 Waveforms of (a) load voltage, (b) load current, (c) voltage ripple ...Figure 11.9 Voltage waveform of capacitors (a) C1, (b) C2, (c) C3, (d) Co.Figure 11.10 The voltage waveform of inductors (a) L1, (b) L2, (c) L3.Figure 11.11 The current waveform of inductors (a) L1, (b) L2, (c) L3.Figure 11.12 The waveforms of the capacitor currents (a) C2, (b) C3.Figure 11.13 The voltage stress waveforms of switches (a) S1, (b) S2, and diodes...Figure 11.14 The real gain of the proposed converter versus Ideal gain.Figure 11.15 The efficiency curve of the proposed converter in terms of (a) Duty...Figure 11.16 Block diagram of control mechanism to better utilization of the pro...Figure 11.17 Variation of (a) output voltage and (b) duty cycle versus reference...Figure 11.18 Dynamic behavior of the proposed converter due to the changes of (a...Figure 11.19 (a) P-V characteristic, and (b) P-I characteristic of a 120 [W] sol...Figure 11.20 The connection between a photovoltaic panel and proposed structure ...Figure 11.21 The simulation results for MPP tracking by the converter.

      12 Chapter 12Figure 12.1 Ring topology of multi-terminal DC microgrid.Figure 12.2 Schematic diagram of MMC-based DC microgrid grounding position.Figure 12.3 Fault current path at MMC side under unipolar fault.Figure 12.4 Equivalent circuit at MMC side under unipolar fault.Figure 12.5 Fault current path under bipolar fault.Figure 12.6 Fault current path under bipolar fault before MMC being blocked.Figure 12.7 Fault current path under bipolar fault after MMC being blocked.Figure 12.8 Schematic diagram of protection zone division.Figure 12.9 Schematic architecture of integrated control and protection platform...Figure 12.10 Flow chart of DC bipolar fault isolation and recovery.Figure 12.11 Laboratory setting for the DC microgrid tests.Figure 12.12 Fault sets selected on the studied DC microgrid.Figure 12.13 Simulation of positive pole metallic fault on DC line CL1. (a) Faul...Figure 12.14 Positive pole fault through 300 Ω transition resistance on DC line ...Figure 12.15 Positive pole fault through 300 Ω transition resistance on DC line ...Figure 12.16 Simulation of bipolar fault on DC line CL7. (a) Fault current at bo...Figure 12.17 Output of VSC2 under DC line CL7 bipolar fault. (a) Bipolar DC volt...

      13 Chapter 13Figure 13.1 DC microgrid system under study.Figure 13.2 Structure of decision tree for binary classification.Figure 13.3 Classes of two-dimensional classification in the feature space.Figure 13.4 Flow chart of decision tree-based algorithm.Figure 13.5 Fault current and voltage during a PG fault in section D1 for GC ((a...Figure 13.6 Confusion matrix of decision tree-based classifier.Figure 13.7 ROC curve of the trained DT classifier.Figure 13.8 Comparison of mode detection accuracy (%) of DT-1 with other machine...Figure 13.9 Comparison of DT-based scheme in terms of reliability indices.Figure 13.10 Fault current and voltage during a PG fault in section D3 for GC ((...Figure 13.11 Generation of trip signal for the fault case depicted in Figure 13....Figure 13.12 Fault current and voltage during a PG fault in section D2 for GC ((...Figure 13.13 Trip signal for the fault case depicted in Figure 13.12 (a) for GC ...

      14 Chapter 14Figure 14.1 Typical microgrid structure.Figure 14.2 Block diagram of the multiple DGs distribution system.Figure 14.3 Block diagram of Static Transfer Switch (STS).Figure 14.4 The PL < PDG, DG1 and DG2 are in condition of islanding, and synchro...Figure 14.5 The PL > PDG islanding condition of DG1 power sharing of DG2 and...Figure 14.6 The PL > PDG Power sharing of DG1, islanding condition of DG2...Figure 14.7 Voltage level of both DGs and PCC when PL = PDG.Figure 14.8 Voltage at PCC during three different condition and No tripping sign...Figure 14.9 Proposed grid-connected PV system.Figure 14.10 Flow chart.Figure 14.11 When PL > PDG. (a) Voltage reduces after grid disconnectio...Figure 14.12 When PL < PDG. (a) Voltage increases after grid disconnection. (b) ...Figure 14.13 When PL = PDG. (a) Voltage same after grid disconnection. (b) Extra...Figure 14.14 Block diagram of individual harmonic extraction.Figure 14.15 Harmonic measurement circuit.Figure 4.16 Hardware results. (a) Operation STS after load change. (b) Tripping ...Figure 14.17 Voltage waveform at PCC with harmonic detection. (a) Islanding with...

      Guide

      1  Cover

      2  Table of Contents

      3  Title Page

      4  Copyright

      5  Preface

      6  Begin Reading

      7  Index

      8  Also of Interest

      9  End User License Agreement

      Pages

      1  v

      2  ii

      3  iii

      4  СКАЧАТЬ