Quantum Computing. Hafiz Md. Hasan Babu

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СКАЧАТЬ 18.5.2 NOT gate clock zones

       18.5.3 Majority voter clock zones

       18.6 Summary

       Further reading

       19 QCA adder and subtractor

       19.1 The Ex-OR gate

       19.2 The QCA half-adder and half-subtractor

       19.3 The QCA full-adder and full-subtractor

       19.3.1 Implementation of the full-adder and full-subtractor

       19.4 Summary

       Further reading

       20 The QCA multiplier and divider

       20.1 The QCA multiplier

       20.1.1 Multiplication networks

       20.1.2 QCA multiplication networks

       20.1.3 Multiplier design

       20.1.4 QCA implementation

       20.2 The QCA divider

       20.2.1 The non-restoring binary divider

       20.2.2 Divider implementation

       20.3 Summary

       Further reading

       21 QCA asynchronous and synchronous counters

       21.1 The asynchronous counter

       21.1.1 The dual-edge triggered J-K flip-flop

       21.1.2 The design of dual-edge triggered J-K flip-flop

       21.1.3 The asynchronous backward counter

       21.2 The synchronous counter

       21.2.1 QCA synchronous counters

       21.3 Summary

       Further reading

       22 The QCA decoder and encoder

       22.1 The QCA decoder

       22.1.1 The QCA 2-to-4 decoder

       22.1.2 The QCA 3-to-8 decoder

       22.2 The QCA encoder

       22.2.1 The QCA turbo encoder design

       22.2.2 The RC encoder with single-feedback

       22.2.3 The RC encoder with multi-feedback

       22.3 Summary

       Further reading

       23 The QCA multiplexer and demultiplexer

       23.1 The QCA 2-to-1 multiplexer

       23.2 The QCA 4-to-1 multiplexer

       23.3 The QCA 1-to-2 demultiplexer

       23.4 The QCA 1-to-4 demultiplexer

       23.5 Multiplexing/demultiplexing using QCA

       23.5.1 The effect of the selector line (S0,S1) on the 2-to-1 MUX/1-to-2 DEMUX

       23.6 Summary

       Further reading

       24 The QCA RAM, ROM, and processor

       24.1 The RAM cell

       24.2 The QCA ROM

       24.3 The QCA processor

       24.3.1 Instruction memory

       24.3.2 Data memory

       24.3.3 The arithmetic logic unit

       24.3.4 The integrated processor

       24.4 СКАЧАТЬ